1. Field of the Invention
The present invention relates to a semiconductor lead frame, and more particularly, to a lead frame having an improved pre-treatment process and a plating method of the lead frame.
2. Description of the Related Art
A semiconductor lead frame is an important element of a semiconductor package, together with semiconductor chips, and connects the inside of the semiconductor package and the outside thereof and supports the semiconductor chips. A semiconductor lead frame is generally manufactured by a stamping process or an etching process.
A semiconductor lead frame manufactured by one of the two processing methods has a variety of structures according to the type of being mounted on a substrate.
FIG. 1 is a schematic plan view illustrating the structure of a conventional semiconductor lead frame.
Referring to the drawing, a semiconductor lead frame 10 includes a die pad unit 11 for mounting a semiconductor memory chip and fixing the same at a static state, an internal lead 12 connected to the chip by wire bonding, and an external lead 13 for connection with an external circuit.
The semiconductor lead frame 10 having the aforementioned configuration forms a semiconductor package through assembly with other parts of the semiconductor, e.g., a memory chip. In the course of assembling the semiconductor package, in order to improve a wire bonding property between the semiconductor chip and the internal lead 12 of the lead frame 10 and a solderability of the die pad unit 11, a metal material having a predetermined property is often plated on the die pad unit 11 and the internal lead 12 of the lead frame 10. Also, in order to improve solderability for substrate mounting after molding a resin protective layer, solder (Snxe2x80x94Pb) plating is performed on a predetermined portion of the external lead 13.
However, during the solder plating, a plating solution frequently encroaches on a region of the external lead 13, so that an extra step of removing the encroachment of the plating solution is necessary.
To solve this problem, a pre-plated frame (to be referred to as xe2x80x9cPFxe2x80x9d hereinafter) method, as disclosed in Japanese Patent Publication No. Showa 63-2358, has been suggested. According to the PPF method, before a semiconductor packaging process, a substrate made of a material having good solder wettability is previously formed to form an intermediate plating layer.
As described above, in the pre-plated lead frame, since plating is performed over the entire surface of a thin plate material, a pretreatment process is performed before plating. The pre-treatment process is performed for improving adhesiveness between plating layers by cleaning and flattening the plated surface. If the pre-treatment process is incompletely performed, it sometimes happens that various kinds of defects such as generation of peeling or swelling of a plating layer, non-uniform spots and gloss, roughness of a plating layer, or the generation of pinholes.
The pre-treatment process for suppressing the generation of the above-described defects is generally electrocleaning including an organic solvent degreasing step, an inorganic matter degreasing step, an acid submerging step and a rinsing step. Also, in order to increase the surface adhesiveness between a raw material and a plating layer, electroplating is additionally performed after the electrocleaning, thereby activating the surface of the raw material.
The electroplating process activates the surface of a base metal to increase an interface bondability between a nickel plated layer and the base metal during nickel plating. The manufacture stress of the raw material of a semiconductor lead frame manufactured by rolling is not completely removed even if unwinding is performed, and local microcracks or local stress may exist on the surface of the raw material.
Even if a degreasing process for removing an anti-corrosive oil or inorganic matter present on the surface of the raw material, is performed on the base metal, microcracks still remain thereon. If conventional multi-layer plating is performed on the surface, the surface of the plating layer becomes relatively flattened. However, if a lead frame is bent in order to mount a semiconductor on a substrate, the stress and microcracks remaining on the surface of the base metal increase by the bending process, leading to increased microcracks to cause cracks to plating layers deposited on the surface of the base metal, thereby resulting in corrosion and oxidation of the base metal. Also, even if microcrack portions and stress remainder portions are plated, the microcrack portions are not completely plated and pores may remain. If the pores are exposed to deteriorating conditions, such as heat applied during a semiconductor manufacturing process, corrosion due to microcracks is expedited. Also, corrosion of raw materials of a lead frame may occur due to internal heat caused by continuous operation of semiconductor circuits. Further, cracks may grow over time by the remaining internal bending stress. Thus, the microcracks remaining on the surface of the base metal are etched by electropolishing, thereby removing the microcracks and the remaining stress portions. In this case, if a protective plating layer deposited on the surface of the base metal is considerably thick, the above-noted problems may be prevented to an extent. However, if the underlying plating and protective plating layer are thick, solder wettability is lowered and cracks may be caused during bending.
However, if electropolishing is performed during the pre-treatment process, inclusions of metal or nonmetal in the thin plate material are exposed to the surface of the thin plate material, as shown in FIGS. 2 and 3. In other words, since alloy element materials added during manufacture as well as main underlying metal material are compressed on the surface of the thin plate material together with raw materials when rolling the thin plate material, they do not protrude and are not shown due to a surface oxide layer, an anti-corrosive oil or inorganic matter. However, the surface of the thin plate material is electropolished, the inclusions are exposed to the surface. In the exposed state, if plating of nickel (Ni) or the like is performed, nodules which are scattered through the surface of the thin plate material, are plated, as shown in FIG. 4. Since the thus-plated nodules are weakly bonded at interfaces with underlying metal during bending of the thin plate material, they may be separated from bonding. Also, when a semiconductor device is finally mounted on the surface of a substrate, solder wettability may be lowered due to an aging process applied to a lead frame during the manufacture of the semiconductor device. In the case where the inclusion present on the surface of the base metal is iron (Fe) as in this embodiment, Fe is oxidized more easily than copper (Cu) which is a main material, due to heat applied during manufacture of the semiconductor device, and the thermal diffusion leads to an upper plating layer to then be diffused to the surface of the plating layer, thereby lowering the solder wettability. Also, the plating layer may be peeled from the nodules due to a mechanical shock caused by a capillary or thermal pressure during wire bonding. Also, the peeled nodules are electrodeposited on the head portion of the capillary so that the capillary is severely contaminated or abraded, thereby causing the necessity of replacing capillaries often. Moreover, during wire bonding, even the bottom layer of the bonded part of a plated lead frame may be damaged due to the nodules electrodeposited on the capillary. Conventionally, this problem has not been generated by forming a thick multi-layer plated layer even if inclusions remain on the surface of the base metal. To avoid the occurrence of the problem, in the conventional pre-plated lead frame, a nickel plating is formed as an underlying layer and then a protective layer is plated as a functional plating layer. However, if the protective plating layer becomes thicker, a standby time for adhesion between the underlying layer at which solder wetting is actually performed, and the solder, is delayed, thereby lowering solder wettability. A Pd plating as a protective layer is generally formed to a thickness of 6 to 7 xcexcm. In this case, the above-mentioned problem is generated due to the inclusion on the surface of the base metal. In the pre-plating which has been recently in widespread use, increasing the plating layer extremely lowers the commercial availability due to a rise in the price of palladium (Pd) which has been widely used as a protective plating layer.
To solve the above problems, it is an object of the present invention to provide a method of manufacturing a lead frame which can improve corrosion resistance, suppress generation of nodules exposed during electropolishing, increase interface adhesiveness during formation of a plating layer and can form a flat plating layer.
It is another object of the present invention to provide a lead frame for a semiconductor device having excellent wire bondability and solder wettability while having a thin protective plating layer in a multi-layer plated lead frame.
It is still another object of the present invention to provide a lead frame made of a material formed by the manufacturing method.
Accordingly, to achieve the first object, there is provided a method for manufacturing a lead frame including the steps of electrocleaning the surface of a thin plate material, electropolishing the electrocleaned thin plate material, removing inclusions on the surface of the electropolished thin plate material, rinsing the inclusion-removed thin plate material with an acidic solution, and forming multi-plated layers on the rinsed material.
In the present invention, the inclusion-removing step includes the step of anodic-degreasing the thin plate material.
To achieve the second object, there is provided a lead frame having an inner lead portion and an outer lead portion formed by electropolishing a cleaned thin plate material, removing inclusion on the surface of the electropolished thin plate material having multi-plated layers, rinsing the same and forming multi-plated layers thereon.